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| NO T DUC E NT PRO LACEM TE RE P OLE OB S E N D E D M OM Data Sheet RE C CA124, CA224, CA324, LM324, LM2902 May 2001 File Number 796.5 itle 12 224 324 324 290 bad, Hz, raal plis , usl, ilis) tho yds er- Quad, 1MHz, Operational Amplifiers for Commercial, Industrial, and Military Applications The CA124, CA224, CA324, LM324, and LM2902 consist of four independent, high-gain operational amplifiers on a single monolithic substrate. An on-chip capacitor in each of the amplifiers provides frequency compensation for unity gain. These devices are designed specially to operate from either single or dual supplies, and the differential voltage range is equal to the power-supply voltage. Low power drain and an input common-mode voltage range from 0V to V+ -1.5V (single-supply operation) make these devices suitable for battery operation. Features * Operation from Single or Dual Supplies * Unity-Gain Bandwidth . . . . . . . . . . . . . . . . . . .1MHz (Typ) * DC Voltage Gain . . . . . . . . . . . . . . . . . . . . . . 100dB (Typ) * Input Bias Current . . . . . . . . . . . . . . . . . . . . . . 45nA (Typ) * Input Offset Voltage . . . . . . . . . . . . . . . . . . . . . 2mV (Typ) * Input Offset Current - CA224, CA324, LM324, LM2902 . . . . . . . . . . 5nA (Typ) - CA124. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3nA (Typ) * Replacement for Industry Types 124, 224, 324 Part Number Information PART NUMBER (BRAND) CA0124E CA0124M (124) CA0124M96 (124) CA0224E CA0224M (224) CA0324E CA0324M (324) CA0324M96 (324) LM324N LM2902N LM2902M (2902) LM2902M96 (2902) TEMP. RANGE (oC) -55 to 125 -55 to 125 -55 to 125 -40 to 85 -40 to 85 0 to 70 0 to 70 0 to 70 0 to 70 -40 to 85 -40 to 85 -40 to 85 PACKAGE 14 Ld PDIP 14 Ld SOIC 14 Ld SOIC Tape and Reel 14 Ld PDIP 14 Ld SOIC 14 Ld PDIP 14 Ld SOIC 14 Ld SOIC Tape and Reel 14 Ld PDIP 14 Ld PDIP 14 Ld SOIC 14 Ld SOIC Tape and Reel PKG. NO. E14.3 M14.15 M14.15 E14.3 M14.15 E14.3 M14.15 M14.15 E14.3 E14.3 M14.15 M14.15 Applications * Summing Amplifiers * Multivibrators * Oscillators * Transducer Amplifiers * DC Gain Blocks Pinout CA124, CA224, CA324, LM2902 (PDIP, SOIC) LM324 (PDIP) TOP VIEW OUTPUT 1 NEG. INPUT 1 POS. INPUT 1 V+ POS. INPUT 2 NEG. INPUT 2 OUTPUT 2 1 2 3 4 5 + 6 7 + 2 3 1 + 4 + 14 OUTPUT 4 13 NEG. INPUT 4 12 POS. INPUT 4 11 V10 9 8 POS. INPUT 3 NEG. INPUT 3 OUTPUT 3 1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Intersil and Design is a trademark of Intersil Americas Inc. | Copyright (c) Intersil Americas Inc. 2001 CA124, CA224, CA324, LM324, LM2902 Absolute Maximum Ratings Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32V or 16V Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .32V Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 32V Input Current (VI < -0.3V, Note 1) . . . . . . . . . . . . . . . . . . . . . . 50mA Output Short Circuit Duration (V+ 15V, Note 2) . . . . . .Continuous Thermal Information Thermal Resistance (Typical, Note 3) JA (oC/W) PDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95 SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 175 Maximum Junction Temperature (Die). . . . . . . . . . . . . . . . . . . 175oC Maximum Junction Temperature (Plastic Package). . . . . . . . . 150oC Maximum Storage Temperature Range . . . . . . . . . . -65oC to 150oC Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . . 300oC (SOIC - Lead Tips Only) Operating Conditions Temperature Range CA124 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -55oC to 125oC CA224, LM2902 . . . . . . . . . . . . . . . . . . . . . . . . . . . -40oC to 85oC CA324, LM324 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0oC to 70oC CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTES: 1. This input current will only exist when the voltage at any of the input leads is driven negative. This current is due to the collector base junction of the input p-n-p transistors becoming forward biased and thereby acting as input diode clamps. In addition to this diode action, there is also lateral n-p-n parasitic transistor action on the IC chip. This transistor action can cause the output voltages of the amplifiers to go to the V+ voltage level (or to ground for a large overdrive) for the time duration that an input is driven negative. This transistor action is not destructive and normal output states will reestablish when the input voltage, which was negative, again returns to a value greater than -0.3V. 2. The maximum output current is approximately 40mA independent of the magnitude of V+. Continuous short circuits at V+ > 15V can cause excessive power dissipation and eventual destruction. Short circuits from the output to V+ can cause overheating and eventual destruction of the device. 3. JA is measured with the component mounted on an evaluation PC board in free air. Electrical Specifications Values Apply for Each Operational Amplifier. Supply Voltage V+ = 5V, V- = 0V, Unless Otherwise Specified TEMP. (oC) 25 Full CA124 MIN TYP 2 7 MAX 5 7 CA224, CA324, LM324 MIN TYP 2 7 MAX 7 9 MIN LM2902 TYP 7 MAX 10 UNITS mV mV V/oC PARAMETER Input Offset Voltage (Note 6) Average Input Offset Voltage Drift Differential Input Voltage (Note 5) Input Common Mode Voltage Range (Note 5) Common Mode Rejection Ratio Power Supply Rejection Ratio Input Bias Current (Note 4) Input Offset Current Average Input Offset Current Drift Large Signal Voltage Gain TEST CONDITIONS RS = 0 Full Full V+ = 30V V+ = 30V V+ = 26V DC DC II+ or IIII+ or IIII+ - IIII+ - II25 Full Full 25 25 25 Full 25 Full Full 0 0 70 65 - 85 100 45 3 10 V+ V+ -1.5 V+ -2 150 300 30 100 - 0 0 65 65 - 70 100 45 5 10 V+ V+ -1.5 V+ -2 250 500 50 150 - 0 - 40 45 10 V+ V+ -2 500 200 - V V V V dB dB nA nA nA nA pA/oC RL 2k, V+ = 15V (For Large VO Swing) RL 2k, V+ = 15V (For Large VO Swing) 25 Full 94 88 100 - - 88 83 100 - - 83 - - dB dB 2 CA124, CA224, CA324, LM324, LM2902 Electrical Specifications Values Apply for Each Operational Amplifier. Supply Voltage V+ = 5V, V- = 0V, Unless Otherwise Specified (Continued) TEMP. (oC) 25 Full Full Full Full 25 Full 25 25 Full 25 Full Full CA124 MIN 0 26 27 20 10 10 12 5 TYP 28 5 40 20 20 50 8 -120 0.8 MAX V+ -1.5 20 2 CA224, CA324, LM324 MIN 0 26 27 20 10 10 12 5 TYP 28 5 40 20 20 50 8 -120 0.8 MAX V+ -1.5 20 2 MIN 22 23 10 5 LM2902 TYP 28 5 20 8 0.7 1.5 MAX 100 1.2 3 UNITS V V V V mV mA mA mA A mA dB mA mA PARAMETER Output Voltage Swing TEST CONDITIONS RL = 2k High Level RL = 2k, V+ = 30V RL = 2k, V+ = 26V RL = 10k, V+ = 30V Low Level Output Current Source RL = 10k VI+ = +1V, VI- = 0V, V+ = 15V VI+ = 1V, VI- = 0, V+ = 15V Sink VI+ = 0V, VI- = 1V, V+ = 15V VI+ = 0V, VI- = 1V, VO = 200mV VI- = 1V, VI+ = 0, V+ = 15V Crosstalk Total Supply Current NOTES: f = 1 to 20kHz (Input Referred) RL = RL = , V+ = 26V 4. Due to the PNP input stage the direction of the input current is out of the IC. No loading change exists on the input lines because the current is essentially constant, independent of the state of the output. 5. The input signal voltage and the input common mode voltage should not be allowed to go negative by more than 0.3V. The positive limit of the common mode voltage range is V+ - 1.5V, but either or both inputs can go to +32V without damage. 6. VO = 1.4V, RS = 0 with V+ from 5V to 30V, and over the full input common mode voltage range (0V to V+ - 1.5V). Schematic Diagram (One of Four Operational Amplifiers) V+ 4 TO 2, 3, 4 6A 4A 100 A 5 Q2 Q3 Q4 Q11 Q10 CCOMP Q5 Q6 12 Q7 RSC 1 Q13 Q12 50A TO 2, 3, 4 V- 11 VO 10 9 + 3 8 13 + 4 4 6 + 2 7 - - 2 Q1 INPUTS +3 - Q8 Q9 - 3 CA124, CA224, CA324, LM324, LM2902 Typical Performance Curves 140 OPEN-LOOP VOLTAGE GAIN (dB) 120 100 VI 80 60 40 V+ = 10 TO 15V 20 0 1 10 100 1K 10K 100K FREQUENCY (Hz) 1M 10M V+ = 26V 3 V+/2 11 TA = -40 TA 85 oC 0.1F 2 4 V+ + 1 OUTPUT VOLTAGE (mV) VO 500 2 450 400 350 OUTPUT 300 250 0 1 2 3 4 5 TIME (s) 6 7 8 9 3 VI + 50pF TA = 25 oC V+ = 30V - 1 VO INPUT FIGURE 1. OPEN LOOP FREQUENCY RESPONSE FIGURE 2. VOLTAGE FOLLOWER PULSE RESPONSE (SMALL SIGNAL) 4 3 2 1 INPUT VOLTAGE (V) 0 4 3 2 1 0 10 20 30 TIME (s) 40 FIGURE 3. VOLTAGE FOLLOWER PULSE RESPONSE (LARGE SIGNAL) VICR = 0V 60 50 INPUT CURRENT (nA) 40 30 20 10 0 -75 V+ = 30V 15V 5V SUPPLY CURRENT (mA) OUTPUT VOLTAGE (V) TA = 25 oC V+ = 15V RL = 2k V+ mA 4 4 3 2 TA = 0 oC TO 125 oC 1 -55oC 0 0 5 10 15 20 25 30 POSITIVE SUPPLY VOLTAGE (V) 2 3 + 11 ID - 1 -50 -25 0 25 50 75 100 125 TEMPERATURE (oC) FIGURE 4. INPUT CURRENT vs AMBIENT TEMPERATURE FIGURE 5. SUPPLY CURRENT vs SUPPLY VOLTAGE 4 CA124, CA224, CA324, LM324, LM2902 Typical Performance Curves 20 TA = 25oC OUTPUT VOLTAGE SWING (V) 1k 2 +7V 3 VI 10 + 11 100k OUTPUT SOURCE CURRENT (mA) 4 +15V (Continued) 70 V+ = 15V 60 50 40 30 20 10 0 -75 15 - 1 VO 2k 5 0 1K 10K 100K 1M FREQUENCY (Hz) -50 -25 0 25 50 75 100 125 TEMPERATURE (oC) FIGURE 6. LARGE SIGNAL FREQUENCY RESPONSE FIGURE 7. OUTPUT CURRENT vs AMBIENT TEMPERATURE TA = 25oC OPEN LOOP VOLTAGE GAIN (dB) 75 INPUT CURRENT (nA) 150 125 100 75 50 25 0 0 TA = 25 oC RL = 20k RL = 2k 50 25 0 10 20 30 POSITIVE SUPPLY VOLTAGE (V) 40 10 20 30 40 POSITIVE SUPPLY VOLTAGE (V) FIGURE 8. INPUT CURRENT vs SUPPLY VOLTAGE FIGURE 9. VOLTAGE GAIN vs SUPPLY VOLTAGE 5 CA124, CA224, CA324, LM324, LM2902 Dual-In-Line Plastic Packages (PDIP) N E1 INDEX AREA 12 3 N/2 E14.3 (JEDEC MS-001-AA ISSUE D) 14 LEAD DUAL-IN-LINE PLASTIC PACKAGE INCHES SYMBOL MIN 0.015 0.115 0.014 0.045 0.008 0.735 0.005 0.300 0.240 MAX 0.210 0.195 0.022 0.070 0.014 0.775 0.325 0.280 MILLIMETERS MIN 0.39 2.93 0.356 1.15 0.204 18.66 0.13 7.62 6.10 MAX 5.33 4.95 0.558 1.77 0.355 19.68 8.25 7.11 NOTES 4 4 8 5 5 6 5 6 7 4 9 Rev. 0 12/93 -B-AD BASE PLANE -CSEATING PLANE D1 B1 B D1 A1 A2 L A C L E A A1 A2 B B1 C D D1 E eA eC C e 0.010 (0.25) M C A B S eB NOTES: 1. Controlling Dimensions: INCH. In case of conflict between English and Metric dimensions, the inch dimensions control. 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. 3. Symbols are defined in the "MO Series Symbol List" in Section 2.2 of Publication No. 95. 4. Dimensions A, A1 and L are measured with the package seated in JEDEC seating plane gauge GS-3. 5. D, D1, and E1 dimensions do not include mold flash or protrusions. Mold flash or protrusions shall not exceed 0.010 inch (0.25mm). 6. E and eA are measured with the leads constrained to be perpendicular to datum -C- . 7. eB and eC are measured at the lead tips with the leads unconstrained. eC must be zero or greater. 8. B1 maximum dimensions do not include dambar protrusions. Dambar protrusions shall not exceed 0.010 inch (0.25mm). 9. N is the maximum number of terminal positions. 10. Corner leads (1, N, N/2 and N/2 + 1) for E8.3, E16.3, E18.3, E28.3, E42.6 will have a B1 dimension of 0.030 - 0.045 inch (0.76 1.14mm). E1 e eA eB L N 0.100 BSC 0.300 BSC 0.115 14 0.430 0.150 - 2.54 BSC 7.62 BSC 10.92 3.81 14 2.93 6 CA124, CA224, CA324, LM324, LM2902 Small Outline Plastic Packages (SOIC) N INDEX AREA E -B1 2 3 SEATING PLANE -AD -CA h x 45o H 0.25(0.010) M BM M14.15 (JEDEC MS-012-AB ISSUE C) 14 LEAD NARROW BODY SMALL OUTLINE PLASTIC PACKAGE INCHES SYMBOL A MIN 0.0532 0.0040 0.013 0.0075 0.3367 0.1497 MAX 0.0688 0.0098 0.020 0.0098 0.3444 0.1574 MILLIMETERS MIN 1.35 0.10 0.33 0.19 8.55 3.80 MAX 1.75 0.25 0.51 0.25 8.75 4.00 NOTES 9 3 4 5 6 7 8o Rev. 0 12/93 L A1 B C D E A1 0.10(0.004) C e B 0.25(0.010) M C AM BS e H h L N 0.050 BSC 0.2284 0.0099 0.016 14 0o 8o 0.2440 0.0196 0.050 1.27 BSC 5.80 0.25 0.40 14 0o 6.20 0.50 1.27 NOTES: 1. Symbols are defined in the "MO Series Symbol List" in Section 2.2 of Publication Number 95. 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. 3. Dimension "D" does not include mold flash, protrusions or gate burrs. Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006 inch) per side. 4. Dimension "E" does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.25mm (0.010 inch) per side. 5. The chamfer on the body is optional. If it is not present, a visual index feature must be located within the crosshatched area. 6. "L" is the length of terminal for soldering to a substrate. 7. "N" is the number of terminal positions. 8. Terminal numbers are shown for reference only. 9. The lead width "B", as measured 0.36mm (0.014 inch) or greater above the seating plane, shall not exceed a maximum value of 0.61mm (0.024 inch). 10. Controlling dimension: MILLIMETER. Converted inch dimensions are not necessarily exact. All Intersil products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation's quality certifications can be viewed at website www.intersil.com/design/quality/iso.asp. Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see web site www.intersil.com Sales Office Headquarters NORTH AMERICA Intersil Corporation 2401 Palm Bay Rd. Palm Bay, FL 32905 TEL: (321) 724-7000 FAX: (321) 724-7240 EUROPE Intersil SA Mercure Center 100, Rue de la Fusee 1130 Brussels, Belgium TEL: (32) 2.724.2111 FAX: (32) 2.724.22.05 ASIA Intersil Ltd. 8F-2, 96, Sec. 1, Chien-kuo North, Taipei, Taiwan 104 Republic of China TEL: 886-2-2515-8508 FAX: 886-2-2515-8369 7 |
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